1301 search results - page 244 / 261 » Design and architectures for dependable embedded systems |
ISLPED
2003
ACM
14 years 24 days ago
2003
ACM
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
SENSYS
2003
ACM
14 years 24 days ago
2003
ACM
Simple in-network data aggregation (or fusion) techniques for sensor networks have been the focus of several recent research efforts, but they are insufficient to support advance...
PREMI
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. This paper presents an architecture that enables the recognizer to learn incrementally and, thereby adapt to document image collections for performance improvement. We ar...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
CASES
2003
ACM
14 years 24 days ago
2003
ACM
Knowing the Worst-Case Execution Time (WCET) of a program is necessary when designing and verifying real-time systems. A correct WCET analysis method must take into account the po...