184 search results - page 24 / 37 » Design and chip implementation of the ubiquitous processor H... |
GLVLSI
2011
IEEE
12 years 10 months ago
2011
IEEE
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
MICRO
2005
IEEE
14 years 9 days ago
2005
IEEE
Until recently, a steadily rising clock rate and other uniprocessor microarchitectural improvements could be relied upon to consistently deliver increasing performance for a wide ...
DATE
2009
IEEE
14 years 1 months ago
2009
IEEE
—Multiprocessor System on Chip (MPSoC) architecture is rapidly gaining momentum for modern embedded devices. The vulnerabilities in software on MPSoCs are often exploited to caus...
IEEECGIV
2006
IEEE
14 years 23 days ago
2006
IEEE
The tracking of features in real-time video streams forms the integral part of many important applications in human-computer interaction and computer vision. Unfortunately trackin...
IPPS
2003
IEEE
14 years 6 hour ago
2003
IEEE
The efficient solution of large systems of linear equations represented by sparse matrices appears in many tasks. LU factorization followed by backward and forward substitutions i...