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» Design and evaluation of an auto-memoization processor
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MICRO
2008
IEEE
92views Hardware» more  MICRO 2008»
14 years 2 months ago
Online design bug detection: RTL analysis, flexible mechanisms, and evaluation
Higher level of resource integration and the addition of new features in modern multi-processors put a significant pressure on their verification. Although a large amount of res...
Kypros Constantinides, Onur Mutlu, Todd M. Austin
UIST
2010
ACM
13 years 5 months ago
Soylent: a word processor with a crowd inside
This paper introduces architectural and interaction patterns for integrating crowdsourced human contributions directly into user interfaces. We focus on writing and editing, compl...
Michael S. Bernstein, Greg Little, Robert C. Mille...
TCAD
2008
101views more  TCAD 2008»
13 years 7 months ago
Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors
Functional correctness is a vital attribute of any hardware design. Unfortunately, due to extremely complex architectures, widespread components, such as microprocessors, are often...
Ilya Wagner, Valeria Bertacco, Todd M. Austin
ESM
2000
13 years 9 months ago
SEP: Simulation framework to evaluate digital hardware architectures
Know-how is the most useful mean for designing new processors before a complete hardware description. The integration rate is increasing very quickly and the timeto-market has to ...
Frédéric Mallet, Fernand Boér...
RSP
2003
IEEE
103views Control Systems» more  RSP 2003»
14 years 29 days ago
An Instruction Throughput Model of Superscalar Processors
With advances in semiconductor technology, processors are becoming larger and more complex. Future processor designers will face an enormous design space, and must evaluate more a...
Tarek M. Taha, D. Scott Wills