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» Design and evaluation of an auto-memoization processor
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IPPS
2005
IEEE
15 years 9 months ago
Analysis of Hardware Acceleration in Reconfigurable Embedded Systems
Embedded designers now have the capability of offloading software routines into custom applicationspecific hardware blocks. This paper evaluates a domain-specific design system fo...
Matthew Ouellette, Daniel A. Connors
LDTA
2010
15 years 2 months ago
Using DSLs for developing enterprise systems
This paper investigates the suitability of contemporary DSL tools in the context of enterprise software development. The main focus is on integration issues between the DSL tool, ...
Margus Freudenthal
HPCA
2005
IEEE
15 years 9 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
ISCA
2000
IEEE
93views Hardware» more  ISCA 2000»
15 years 7 months ago
Reconfigurable caches and their application to media processing
High performance general-purpose processors are increasingly being used for a variety of application domains scienti c, engineering, databases, and more recently, media processing...
Parthasarathy Ranganathan, Sarita V. Adve, Norman ...
VEE
2006
ACM
150views Virtualization» more  VEE 2006»
15 years 10 months ago
Evaluating fragment construction policies for SDT systems
Software Dynamic Translation (SDT) systems have been used for program instrumentation, dynamic optimization, security policy enforcement, intrusion detection, and many other uses....
Jason Hiser, Daniel Williams, Adrian Filipi, Jack ...