620 search results - page 77 / 124 » Design and evaluation of an auto-memoization processor |
114
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ISVLSI
2008
IEEE
15 years 10 months ago
2008
IEEE
Powerful branch predictors along with a large branch target buffer (BTB) are employed in superscalar processors for instruction-level parallelism exploitation. However, the large ...
138
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DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
157
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ISCA
2007
IEEE
15 years 10 months ago
2007
IEEE
Software cache-based side channel attacks are a serious new class of threats for computers. Unlike physical side channel attacks that mostly target embedded cryptographic devices,...
129
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IEEEPACT
2008
IEEE
15 years 10 months ago
2008
IEEE
Achieving good performance on a modern machine with a multi-level memory hierarchy, and in particular on a machine with software-managed memories, requires precise tuning of progr...
146
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EUROSYS
2008
ACM
16 years 1 months ago
2008
ACM
Non-uniform utilization of functional units in combination with hardware mechanisms such as clock gating leads to different power consumptions in different parts of a processor ch...