97 search results - page 7 / 20 » Design and implementation of JPEG encoder IP core |
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—In this paper, a novel approach for integrating static non-preemptive software scheduling in formal bottom-up performance evaluation of embedded system models is described. The ...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
Emerging embedded System-on-Chip (SoC) platforms are increasingly becoming multiprocessor architectures. The advances in the FPGA chip technology make the implementation of such a...
DATE
2002
IEEE
14 years 11 days ago
2002
IEEE
We advocate a network on silicon (NOS) as a hardware architecture to implement communication between IP cores in future technologies, and as a software model in the form of a prot...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
This paper presents a way of encoding some kinds of dynamic reconfiguration behaviour in the interface portion of circuit descriptions. This has many advantages. The user of a rec...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Multiprocessor SoC systems have led to the increasing use of parallel hardware along with the associated software. These approaches have included coprocessor, homogeneous processo...