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» Design and implementation of WIRE Diameter
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DFT
2003
IEEE
132views VLSI» more  DFT 2003»
14 years 3 months ago
Level-Hybrid Optoelectronic TESH Interconnection Network
This paper discusses a hybrid optoelectronic scheme for a new interconnection network, "Tori connected mESHes (TESH)". The major features of TESH are the following: it i...
Vijay K. Jain, Glenn H. Chapman
ASPDAC
2007
ACM
81views Hardware» more  ASPDAC 2007»
14 years 1 months ago
LEAF: A System Level Leakage-Aware Floorplanner for SoCs
Abstract-- Process scaling and higher leakage power have resulted in increased power densities and elevated die temperatures. Due to the interdependence of temperature and leakage ...
Aseem Gupta, Nikil D. Dutt, Fadi J. Kurdahi, Kamal...
ERSA
2008
130views Hardware» more  ERSA 2008»
13 years 11 months ago
Evaluation of MuCCRA-D: A Dynamically Reconfigurable Processor with Directly Interconnected PEs
Coarse-grained dynamically reconfigurable processor arrays (DRPAs) have been received an attention as a flexible and efficient off-loading engine for various types of System-on-Ch...
Masaru Kato, Yohei Hasegawa, Hideharu Amano
IJNSEC
2008
140views more  IJNSEC 2008»
13 years 9 months ago
A Secure Group Key Management Scheme for Wireless Cellular Systems
In wireless networks, secure multicast protocols are more difficult to implement efficiently due to the dynamic nature of the multicast group and the scarcity of bandwidth at the ...
Hwa Young Um, Edward J. Delp
FPGA
2004
ACM
117views FPGA» more  FPGA 2004»
14 years 3 months ago
A magnetoelectronic macrocell employing reconfigurable threshold logic
In this paper, we introduce a reconfigurable fabric based around a new class of circuit element: the hybrid Hall effect (HHE) magnetoelectronic device. Because they incorporate a ...
Steve Ferrera, Nicholas P. Carter