189 search results - page 2 / 38 » Design and implementation of WIRE Diameter |
HPCA
2009
IEEE
14 years 10 months ago
2009
IEEE
Interconnection plays an important role in performance and power of CMP designs using deep sub-micron technology. The network-on-chip (NoCs) has been proposed as a scalable and hi...
ICCAD
2005
IEEE
14 years 6 months ago
2005
IEEE
— When exploring computing elements made from technologies other than CMOS, it is imperative to investigate the effects of physical implementation constraints. This paper focuses...
FPGA
1998
ACM
14 years 2 months ago
1998
ACM
In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is dicult to nd an optim...
ICPP
2005
IEEE
14 years 3 months ago
2005
IEEE
In this paper, we propose a new protocol called Shared Tree Streaming (or STS in short) protocol that is designed for interactive multimedia streaming applications. STS is a decen...
ISCAS
2005
IEEE
14 years 3 months ago
2005
IEEE
— As across-chip wire delays exceed a clock cycle, interconnect pipelining becomes essential. However, the arbitrary insertion of flip-flops can change the differentials of lat...