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» Design and implementation of WIRE Diameter
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MOBIHOC
2003
ACM
14 years 9 months ago
Energy-efficient caching strategies in ad hoc wireless networks
In this paper, we address the problem of energy-conscious cache placement in wireless ad hoc networks. We consider a network comprising a server with an interface to the wired net...
Pavan Nuggehalli, Vikram Srinivasan, Carla-Fabiana...
DSD
2009
IEEE
118views Hardware» more  DSD 2009»
14 years 4 months ago
Internet-Router Buffered Crossbars Based on Networks on Chip
—The scalability and performance of the Internet depends critically on the performance of its packet switches. Current packet switches are based on single-hop crossbar fabrics, w...
Kees Goossens, Lotfi Mhamdi, Iria Varela Senin
HOTI
2008
IEEE
14 years 4 months ago
Network Processing on an SPE Core in Cell Broadband Engine
Cell Broadband EngineTM is a multi-core system on a chip and is composed of a general-purpose Power Processing Element (PPE) and eight Synergistic Processing Elements (SPEs). Its ...
Yuji Kawamura, Takeshi Yamazaki, Hiroshi Kyusojin,...
MICRO
2008
IEEE
116views Hardware» more  MICRO 2008»
14 years 4 months ago
Power reduction of CMP communication networks via RF-interconnects
As chip multiprocessors scale to a greater number of processing cores, on-chip interconnection networks will experience dramatic increases in both bandwidth demand and power dissi...
M.-C. Frank Chang, Jason Cong, Adam Kaplan, Chunyu...
MICRO
2007
IEEE
150views Hardware» more  MICRO 2007»
14 years 4 months ago
Leveraging 3D Technology for Improved Reliability
Aggressive technology scaling over the years has helped improve processor performance but has caused a reduction in processor reliability. Shrinking transistor sizes and lower sup...
Niti Madan, Rajeev Balasubramonian