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ICS
2001
Tsinghua U.
14 years 1 months ago
Slice-processors: an implementation of operation-based prediction
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
Andreas Moshovos, Dionisios N. Pnevmatikatos, Amir...
MICRO
2009
IEEE
326views Hardware» more  MICRO 2009»
14 years 3 months ago
DDT: design and evaluation of a dynamic program analysis for optimizing data structure usage
Data structures define how values being computed are stored and accessed within programs. By recognizing what data structures are being used in an application, tools can make app...
Changhee Jung, Nathan Clark
GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
13 years 24 days ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
ICCV
2007
IEEE
14 years 11 months ago
Population Shape Regression From Random Design Data
Regression analysis is a powerful tool for the study of changes in a dependent variable as a function of an independent regressor variable, and in particular it is applicable to t...
Bradley C. Davis, P. Thomas Fletcher, Elizabeth Bu...
IPPS
2006
IEEE
14 years 3 months ago
FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...