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» Design considerations for MRAM
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EUROSYS
2009
ACM
16 years 1 months ago
Tralfamadore: unifying source code and execution experience
Program source is an intermediate representation of software; it lies between a developer’s intention and the hardware’s execution. Despite advances in languages and developme...
Geoffrey Lefebvre, Brendan Cully, Michael J. Feele...
EUROSYS
2008
ACM
16 years 1 months ago
Task activity vectors: a new metric for temperature-aware scheduling
Non-uniform utilization of functional units in combination with hardware mechanisms such as clock gating leads to different power consumptions in different parts of a processor ch...
Andreas Merkel, Frank Bellosa
ICCD
2005
IEEE
120views Hardware» more  ICCD 2005»
16 years 1 months ago
Novel Low-Overhead Operand Isolation Techniques for Low-Power Datapath Synthesis
: Power consumption in datapath modules due to redundant switching is an important design concern for high-performance applications. Operand isolation schemes are adopted to reduce...
Nilanjan Banerjee, Arijit Raychowdhury, Swarup Bhu...
105
Voted
ICCAD
2004
IEEE
94views Hardware» more  ICCAD 2004»
16 years 1 months ago
Timing macro-modeling of IP blocks with crosstalk
With the increase of design complexities and the decrease of minimal feature sizes, IP reuse is becoming a common practice while crosstalk is becoming a critical issue that must b...
Ruiming Chen, Hai Zhou
ICCAD
2002
IEEE
149views Hardware» more  ICCAD 2002»
16 years 1 months ago
Gate sizing using Lagrangian relaxation combined with a fast gradient-based pre-processing step
─ In this paper, we present Forge, an optimal algorithm for gate sizing using the Elmore delay model. The algorithm utilizes Lagrangian relaxation with a fast gradient-based pre-...
Hiran Tennakoon, Carl Sechen