Sciweavers

343 search results - page 14 / 69
» Design methodology for IRA codes
Sort
View
SP
2008
IEEE
13 years 10 months ago
Predictable Design of Network-Based Covert Communication Systems
This paper presents a predictable and quantifiable approach to designing a covert communication system capable of effectively exploiting covert channels found in the various layer...
Ronald William Smith, George Scott Knight
IPPS
1999
IEEE
14 years 2 months ago
A Factorial Performance Evaluation for Hierarchical Memory Systems
In this study, we introduce an evaluation methodology for advanced memory systems. This methodology is based on statistical factorial analysis. It is two fold: it first determines...
Xian-He Sun, Dongmei He, Kirk W. Cameron, Yong Luo
ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
14 years 2 months ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
CODES
2001
IEEE
14 years 1 months ago
Evaluating register file size in ASIP design
Interest in synthesis of Application Specific Instruction Set Processors or ASIPs has increased considerably and a number of methodologies have been proposed for ASIP design. A ke...
Manoj Kumar Jain, Lars Wehmeyer, Stefan Steinke, P...
DATE
2009
IEEE
150views Hardware» more  DATE 2009»
14 years 4 months ago
A co-design approach for embedded system modeling and code generation with UML and MARTE
—In this paper we propose a UML/MDA approach, called MoPCoM methodology, to design high quality real-time embedded systems. We have defined a set of rules to build UML models fo...
Jorgiano Vidal, Florent de Lamotte, Guy Gogniat, P...