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» Design methodology for IRA codes
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IPPS
1998
IEEE
14 years 2 months ago
Synthesis of a Systolic Array Genetic Algorithm
The paper presents the design of a hardware genetic algorithm which uses a pipeline of systolic arrays. Demostrated is the design methodology, where a simple genetic algorithm exp...
Graham M. Megson, I. M. Bland
JCP
2008
162views more  JCP 2008»
13 years 10 months ago
A Hypercube-based Scalable Interconnection Network for Massively Parallel Computing
An important issues in the design of interconnection networks for massively parallel computers is scalability. A new scalable interconnection network topology, called Double-Loop H...
Youyao Liu, Jungang Han, Huimin Du
SCAM
2006
IEEE
14 years 3 months ago
Evaluating C++ Design Pattern Miner Tools
Many articles and tools have been proposed over the years for mining design patterns from source code. These tools differ in several aspects, thus their fair comparison is hard. B...
Lajos Jeno Fülöp, Tamas Gyovai, Rudolf F...
CODES
2006
IEEE
14 years 4 months ago
Streamroller: : automatic synthesis of prescribed throughput accelerator pipelines
In this paper, we present a methodology for designing a pipeline of accelerators for an application. The application is modeled using sequential C language with simple stylization...
Manjunath Kudlur, Kevin Fan, Scott A. Mahlke
CODES
2004
IEEE
14 years 1 months ago
Efficient exploration of on-chip bus architectures and memory allocation
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...
Sungchan Kim, Chaeseok Im, Soonhoi Ha