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» Design methodology for IRA codes
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DATE
2004
IEEE
181views Hardware» more  DATE 2004»
14 years 2 months ago
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models
Retargetable C compilers are key tools for efficient architecture exploration for embedded processors. In this paper we describe a novel approach to retargetable compilation based...
Manuel Hohenauer, Hanno Scharwächter, Kingshu...
CODES
2000
IEEE
14 years 3 months ago
Extended design reuse trade-offs in hardware-software architecture mapping
In the design of embedded systems-on-chip, the success of a product generation depends on the exibility to accommodate future design changes. This requirement in uences the hardwa...
Frederik Vermeulen, Francky Catthoor, Diederik Ver...
DAC
1997
ACM
14 years 3 months ago
A Parallel/Serial Trade-Off Methodology for Look-Up Table Based Decoders
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...
Claus Schneider
ASAP
2006
IEEE
110views Hardware» more  ASAP 2006»
14 years 5 months ago
Loop Transformation Methodologies for Array-Oriented Memory Management
Abstract – The storage requirements in data-dominant signal processing systems, whose behavior is described by arraybased, loop-organized algorithmic specifications, have an imp...
Florin Balasa, Per Gunnar Kjeldsberg, Martin Palko...
ICSE
1997
IEEE-ACM
14 years 3 months ago
Designing Distributed Applications with Mobile Code Paradigms
Large scale distributed systems are becoming of paramount importance, due to the evolution of technology and to the interest of market. Their development, however, is not yet supp...
Antonio Carzaniga, Gian Pietro Picco, Giovanni Vig...