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MICRO
2003
IEEE
152views Hardware» more  MICRO 2003»
14 years 3 months ago
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor
Single-event upsets from particle strikes have become a key challenge in microprocessor design. Techniques to deal with these transient faults exist, but come at a cost. Designers...
Shubhendu S. Mukherjee, Christopher T. Weaver, Joe...
HYBRID
2005
Springer
14 years 3 months ago
Mode-Automata Based Methodology for Scade
In this paper, we present a new design methodology for synchronous reactive systems, based on a clear separation between control and data flow parts. This methodology allows to fa...
Ouassila Labbani, Jean-Luc Dekeyser, Pierre Boulet
TCOM
2010
111views more  TCOM 2010»
13 years 8 months ago
Design of irregular LDPC codes with optimized performance-complexity tradeoff
—The optimal performance-complexity tradeoff for error-correcting codes at rates strictly below the Shannon limit is a central question in coding theory. This paper proposes a nu...
Benjamin Smith, Masoud Ardakani, Wei Yu, Frank R. ...
CODES
2001
IEEE
14 years 1 months ago
A design framework to efficiently explore energy-delay tradeoffs
Comprehensive exploration of the design space parameters at the system-level is a crucial task to evaluate architectural tradeoffs accounting for both energy and performance const...
William Fornaciari, Donatella Sciuto, Cristina Sil...
DAC
2005
ACM
14 years 11 months ago
Fine-grained application source code profiling for ASIP design
Current Application Specific Instruction set Processor (ASIP) design methodologies are mostly based on iterative architecture exploration that uses Architecture Description Langua...
Kingshuk Karuri, Mohammad Abdullah Al Faruque, Ste...