1164 search results - page 61 / 233 » Design of High Level Modelling High Performance Simulation... |
ICS
1999
Tsinghua U.
14 years 1 days ago
1999
Tsinghua U.
Supercomputer performance is highly dependent on its interconnection subsystem design. In this paper we study how di erent architectural approaches for router design impact into s...
WSC
2007
13 years 10 months ago
2007
Fluctuations of work-in-progress (WIP) levels cause variability of cycle time and often lead to productivity losses in semiconductor wafer fabrication plants. To identify sources ...
GLVLSI
2007
IEEE
13 years 9 months ago
2007
IEEE
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
WSC
1997
13 years 9 months ago
1997
This paper examines the construction and implementation of a simulation model that supports the design and development of the Queston Physician Network. Queston seeks to partner w...
AADEBUG
2005
Springer
14 years 1 months ago
2005
Springer
Reprogrammable hardware systems are traditionally very difficult to debug due to their high level of parallelism. In our solution to this problem, features are inserted into the u...