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CCGRID
2010
IEEE
13 years 8 months ago
A High-Level Interpreted MPI Library for Parallel Computing in Volunteer Environments
Idle desktops have been successfully used to run sequential and master-slave task parallel codes on a large scale in the context of volunteer computing. However, execution of messa...
Troy P. LeBlanc, Jaspal Subhlok, Edgar Gabriel
TCAD
2008
167views more  TCAD 2008»
13 years 7 months ago
System-Level Dynamic Thermal Management for High-Performance Microprocessors
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...
Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K....
ACL
2010
13 years 5 months ago
Reading between the Lines: Learning to Map High-Level Instructions to Commands
In this paper, we address the task of mapping high-level instructions to sequences of commands in an external environment. Processing these instructions is challenging--they posit...
S. R. K. Branavan, Luke S. Zettlemoyer, Regina Bar...
VIS
2006
IEEE
157views Visualization» more  VIS 2006»
14 years 9 months ago
Analyzing Complex FTMS Simulations: a Case Study in High-Level Visualization of Ion Motions
Current practice in particle visualization renders particle position data directly onto the screen as points or glyphs. Using a camera placed at a fixed position, particle motions...
Wojciech Burakiewicz, Robert van Liere
ISQED
2007
IEEE
162views Hardware» more  ISQED 2007»
14 years 1 months ago
Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs
In high-level synthesis for FPGA designs, scheduling and chaining of operations for optimal performance remain challenging problems. In this paper, we present a balanced schedulin...
David Zaretsky, Gaurav Mittal, Robert P. Dick, Pri...