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ICICS
2009
Springer
14 years 2 months ago
Design of Reliable and Secure Multipliers by Multilinear Arithmetic Codes
Abstract. We propose an efficient technique for the detection of errors in cryptographic circuits introduced by strong adversaries. Previously a number of linear and nonlinear err...
Zhen Wang, Mark G. Karpovsky, Berk Sunar, Ajay Jos...
CODES
2005
IEEE
14 years 1 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...