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FPL
2007
Springer
133views Hardware» more  FPL 2007»
14 years 1 months ago
Efficient Modeling and Floorplanning of Embedded-FPGA Fabric
In this paper we present an automatic design flow for generating customized embedded FPGA (eFPGA) fabric and a domain specific SOC+eFPGA architecture. This design flow encompas...
Sumanta Chaudhuri, Jean-Luc Danger, Sylvain Guille...
EUROPAR
2006
Springer
13 years 11 months ago
Hierarchical Model Validation of Symbolic Performance Models of Scientific Kernels
Multi-resolution validation of hierarchical performance models of scientific applications is critical primarily for two reasons. First, the step-by-step validation determines the c...
Sadaf R. Alam, Jeffrey S. Vetter
ICSE
2003
IEEE-ACM
14 years 7 months ago
Embedded Architect: A Tool for Early Performance Evaluation of Embedded Software
Embedded Architect is a design automation tool that embodies a static performance evaluation technique to support early, architecture-level design space exploration for component-...
Jeffry T. Russell, Margarida F. Jacome
BIRTHDAY
2007
Springer
14 years 1 months ago
Models and Software Model Checking of a Distributed File Replication System
With the Distributed File System Replication component, DFS-R, as the central theme, we present selected protocol problems and validation methods encountered during design and deve...
Nikolaj Bjørner
DAC
2010
ACM
13 years 11 months ago
An efficient phase detector connection structure for the skew synchronization system
Clock skew optimization continues to be an important concern in circuit designs. To overcome the influence caused by PVT variations, the automatic skew synchronization scheme can ...
Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih...