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» Design of a WCET-Aware C Compiler
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ASAP
2007
IEEE
112views Hardware» more  ASAP 2007»
13 years 10 months ago
Scheduling Register-Allocated Codes in User-Guided High-Level Synthesis
In high-level synthesis, as for compilers, an important question is when register assignment should take place. Unlike compilers for which the processor architecture is given, syn...
Alain Darte, C. Quinson
PLDI
2000
ACM
14 years 25 days ago
Dynamo: a transparent dynamic optimization system
We describe the design and implementation of Dynamo, a software dynamic optimization system that is capable of transparently improving the performance of a native instruction stre...
Vasanth Bala, Evelyn Duesterwald, Sanjeev Banerjia
ASPLOS
2009
ACM
14 years 9 months ago
Producing wrong data without doing anything obviously wrong!
This paper presents a surprising result: changing a seemingly innocuous aspect of an experimental setup can cause a systems researcher to draw wrong conclusions from an experiment...
Todd Mytkowicz, Amer Diwan, Matthias Hauswirth, Pe...
SCOPES
2005
Springer
14 years 1 months ago
Software Synthesis from the Dataflow Interchange Format
Specification, validation, and synthesis are important aspects of embedded systems design. The use of dataflow-based design environments for these purposes is becoming increasingl...
Chia-Jui Hsu, Shuvra S. Bhattacharyya
IPPS
2007
IEEE
14 years 2 months ago
Optimizing the Fast Fourier Transform on a Multi-core Architecture
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
Long Chen, Ziang Hu, Junmin Lin, Guang R. Gao