Sciweavers

253 search results - page 14 / 51
» Design of a logic element for implementing an asynchronous F...
Sort
View
ICON
2007
IEEE
14 years 1 months ago
Definition and Implementation of Logical Function Blocks Compliant to ForCES Specification
—IETF ForCES (Forwarding and Control Element Separation) is defining specifications for interfaces and modular resources abstractions in open programmable network equipments. Acc...
Ligang Dong, Fenggen Jia, Weiming Wang
BIRTHDAY
2012
Springer
12 years 3 months ago
Cryptography with Asynchronous Logic Automata
We introduce the use of asynchronous logic automata (ALA) for cryptography. ALA aligns the descriptions of hardware and software for portability, programmability, and scalability. ...
Peter Schmidt-Nielsen, Kailiang Chen, Jonathan Bac...
ISLPED
2004
ACM
124views Hardware» more  ISLPED 2004»
14 years 1 months ago
The design of a low power asynchronous multiplier
In this paper we investigate the statistics of multiplier operands and identify two characteristics of their distribution that have important consequences for the design of low po...
Yijun Liu, Stephen B. Furber
AHS
2006
IEEE
137views Hardware» more  AHS 2006»
14 years 1 months ago
Genetic Algorithm based Engine for Domain-Specific Reconfigurable Arrays
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
Wing On Fung, Tughrul Arslan, Sami Khawam
FPGA
2003
ACM
161views FPGA» more  FPGA 2003»
14 years 26 days ago
Implementation of BEE: a real-time large-scale hardware emulation engine
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, R...