253 search results - page 20 / 51 » Design of a logic element for implementing an asynchronous F... |
FPGA
1998
ACM
13 years 12 months ago
1998
ACM
In this paper, we developed Boolean matching techniques for complex programmable logic blocks (PLBs) in LUT-based FPGAs. A complex PLB can not only be used as a K-input LUT, but a...
FPL
2009
Springer
14 years 8 days ago
2009
Springer
Fast carry chains featuring dedicated adder circuitry is a distinctive feature of modern FPGAs. The carry chains bypass the general routing network and are embedded in the logic b...
ARC
2010
Springer
14 years 2 months ago
2010
Springer
This paper presents the design and FPGA-implementation of a sampler that is suited for sampling real-time events in embedded systems. Such sampling is useful, for example, to test ...
FPGA
2004
ACM
14 years 1 months ago
2004
ACM
The cost functions used to evaluate logic synthesis transformations for FPGAs are far removed from the final speed and routability determined after placement, routing and timing a...
GLVLSI
2009
IEEE
14 years 2 months ago
2009
IEEE
In this paper, we describe and discuss the effects of design parameters such as transistor size, output voltage swing and bias current on radiation sensitivity of MOS current mode...