253 search results - page 34 / 51 » Design of a logic element for implementing an asynchronous F... |
COMSWARE
2006
IEEE
14 years 1 months ago
2006
IEEE
Abstract— Control software in routers have gotten increasingly complex today. Further, since the control software runs in every router, managing a large network of routers is com...
ARC
2008
Springer
13 years 9 months ago
2008
Springer
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
IOLTS
2005
IEEE
14 years 1 months ago
2005
IEEE
— In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in G...
FPL
2004
Springer
14 years 1 months ago
2004
Springer
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
ADBIS
2001
Springer
14 years 5 days ago
2001
Springer
Due to the rapid growth of the Web, there is an increasing need for methodologies that support the design of Web-based Information Systems (WIS). After investigating the applicatio...