253 search results - page 3 / 51 » Design of a logic element for implementing an asynchronous F... |
FCCM
2005
IEEE
14 years 1 months ago
2005
IEEE
We report test results from a prototype asynchronous FPGA (AFPGA) implemented in TSMC’s 0.18μm CMOS process. The AFPGA uses SRAM-based configuration bits with pipelined logic ...
ICMCS
2006
IEEE
14 years 1 months ago
2006
IEEE
— A major challenge in the design of any real time system is the proper selection of implementation and platform alternatives. In this paper, a suitable FPGA-based design of the ...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
This paper presents a unifying framework for the modeling of asynchronous pipeline circuits. A pipeline protocol is captured in a graph-based model which defines the partial order...
FPGA
1998
ACM
13 years 12 months ago
1998
ACM
In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is dicult to nd an optim...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
This paper proposes a novel approach to implement software object in hardware. Data-Memory mapping schemes are investigated and four hardware object design schemes are proposed an...