58 search results - page 8 / 12 » Design of a scalable nanophotonic interconnect for future mu... |
HOTI
2011
IEEE
12 years 7 months ago
2011
IEEE
Abstract—Network-on-Chips (NoCs) paradigm is fast becoming a defacto standard for designing communication infrastructure for multicores with the dual goals of reducing power cons...
INTEGRATION
2008
13 years 7 months ago
2008
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
ICPP
2000
IEEE
13 years 12 months ago
2000
IEEE
Current VLSI technology allows more than two wiring layers and the number is expected to rise in future. In this paper, we show that, by designing VLSI layouts directly for an L-l...
ASPDAC
2010
ACM
13 years 5 months ago
2010
ACM
Over the course of this decade, uniprocessor chips have given way to multi-core chips which have become the primary building blocks of today's computer systems. The presence o...
HPDC
2009
IEEE
14 years 2 months ago
2009
IEEE
Since the advent of electronic computing, the processors’ clock speed has risen tremendously. Now that energy efficiency requirements have stopped that trend, the number of proc...