135 search results - page 10 / 27 » Design of steering vectors for dynamically reconfigurable ar... |
MICRO
2000
IEEE
13 years 11 months ago
2000
IEEE
Conventional microarchitectures choose a single memory hierarchy design point targeted at the average application. In this paper, we propose a cache and TLB layout and design that...
FPL
2000
Springer
13 years 11 months ago
2000
Springer
This paper reports on a method for extending existing VHDL design and verification software available for the Xilinx Virtex series of FPGAs. It allows the designer to apply standa...
DSD
2010
IEEE
13 years 5 months ago
2010
IEEE
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
EIT
2008
IEEE
13 years 9 months ago
2008
IEEE
Abstract--Real-time image and multimedia processing applications such as video surveillance and telemedicine can have dynamic requirements of system latency, throughput, and power ...
ERSA
2008
13 years 8 months ago
2008
Coarse-grained dynamically reconfigurable processor arrays (DRPAs) have been received an attention as a flexible and efficient off-loading engine for various types of System-on-Ch...