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FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
14 years 9 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
FPL
2007
Springer
124views Hardware» more  FPL 2007»
16 years 6 days ago
A Quantitative Prediction Model for Hardware/Software Partitioning
An important step in Heterogeneous System Development is Hardware/Software Partitioning. This process involves exploring a huge design space. By using profiling to select hot-spo...
Roel Meeuws, Yana Yankova, Koen Bertels, Georgi Ga...
INFOVIS
2003
IEEE
15 years 11 months ago
Mapping Nominal Values to Numbers for Effective Visualization
Data sets with a large number of nominal variables, some with high cardinality, are becoming increasingly common and need to be explored. Unfortunately, most existing visual explo...
Geraldine E. Rosario, Elke A. Rundensteiner, David...
DATE
2008
IEEE
145views Hardware» more  DATE 2008»
16 years 15 days ago
Minimizing Virtual Channel Buffer for Routers in On-chip Communication Architectures
We present a novel methodology for design space exploration using a two-steps scheme to optimize the number of virtual channel buffers (buffers take the premier share of the route...
Mohammad Abdullah Al Faruque, Jörg Henkel
DT
2006
113views more  DT 2006»
15 years 6 months ago
A Platform-Based Taxonomy for ESL Design
the abstraction level at which designers express systems, enabling new levels of design reuse, and providing for design chain integration ool flows and abstraction levels. The purp...
Douglas Densmore, Roberto Passerone