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» Design space exploration revisited
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ICCAD
2003
IEEE
144views Hardware» more  ICCAD 2003»
16 years 2 months ago
A High-level Interconnect Power Model for Design Space Exploration
— In this paper, we present a high-level power model to estimate the power consumption in semi-global and global interconnects. Such interconnects are used for communications bet...
Pallav Gupta, Lin Zhong, Niraj K. Jha
SAMOS
2007
Springer
15 years 12 months ago
Towards Multi-application Workload Modeling in Sesame for System-Level Design Space Exploration
The Sesame modeling and simulation framework aims at early and thus efficient system-level design space exploration of embedded multimedia system architectures. So far, Sesame onl...
Mark Thompson, Andy D. Pimentel
RSP
2006
IEEE
120views Control Systems» more  RSP 2006»
15 years 12 months ago
A Case Study of Design Space Exploration for Embedded Multimedia Applications on SoCs
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
Isabelle Hurbain, Corinne Ancourt, François...
DATE
2010
IEEE
131views Hardware» more  DATE 2010»
15 years 11 months ago
Energy-performance design space exploration in SMT architectures exploiting selective load value predictions
—This paper presents a design space exploration of a selective load value prediction scheme suitable for energyaware Simultaneous Multi-Threaded (SMT) architectures. A load value...
Arpad Gellert, Gianluca Palermo, Vittorio Zaccaria...
DATE
2009
IEEE
178views Hardware» more  DATE 2009»
16 years 17 days ago
ORION 2.0: A fast and accurate NoC power and area model for early-stage design space exploration
As industry moves towards many-core chips, networks-on-chip (NoCs) are emerging as the scalable fabric for interconnecting the cores. With power now the first-order design constr...
Andrew B. Kahng, Bin Li, Li-Shiuan Peh, Kambiz Sam...