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DSD
2010
IEEE
162views Hardware» more  DSD 2010»
13 years 8 months ago
A Parallel for Loop Memory Template for a High Level Synthesis Compiler
—We propose a parametrized memory template for applications with parallel for loops. The template’s parameters reflect important trade-offs made during system design. The temp...
Craig Moore, Wim Meeus, Harald Devos, Dirk Strooba...
CSCW
2008
ACM
13 years 11 months ago
Range: exploring implicit interaction through electronic whiteboard design
An important challenge in designing ubiquitous computing experiences is negotiating transitions between explicit and implicit interaction, such as how and when to provide users wi...
Wendy Ju, Brian A. Lee, Scott R. Klemmer
VLDB
2008
ACM
170views Database» more  VLDB 2008»
14 years 9 months ago
A layered framework supporting personal information integration and application design for the semantic desktop
With the development of inexpensive storage devices, space usage is no longer a bottleneck for computer users. However, the increasingly large amount of personal information poses ...
Isabel F. Cruz, Huiyong Xiao
ICCAD
1999
IEEE
81views Hardware» more  ICCAD 1999»
14 years 1 months ago
Modeling design constraints and biasing in simulation using BDDs
Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulatio...
Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller,...
SIGMOD
2008
ACM
136views Database» more  SIGMOD 2008»
14 years 9 months ago
Mining relationships among interval-based events for classification
Existing temporal pattern mining assumes that events do not have any duration. However, events in many real world applications have durations, and the relationships among these ev...
Dhaval Patel, Wynne Hsu, Mong-Li Lee