Sciweavers

879 search results - page 113 / 176
» Designing Closer to the Edge
Sort
View
MICRO
2007
IEEE
141views Hardware» more  MICRO 2007»
14 years 3 months ago
Composable Lightweight Processors
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...
Changkyu Kim, Simha Sethumadhavan, M. S. Govindan,...
ISQED
2005
IEEE
84views Hardware» more  ISQED 2005»
14 years 2 months ago
Performance Driven OPC for Mask Cost Reduction
With continued aggressive process scaling in the subwavelength lithographic regime, resolution enhancement techniques (RETs) such as optical proximity correction (OPC) are an inte...
Puneet Gupta, Andrew B. Kahng, Dennis Sylvester, J...
GLVLSI
2003
IEEE
177views VLSI» more  GLVLSI 2003»
14 years 2 months ago
Congestion reduction in traditional and new routing architectures
In dense integrated circuit designs, management of routing congestion is essential; an over congested design may be unroutable. Many factors influence congestion: placement, rout...
Ameya R. Agnihotri, Patrick H. Madden
GLVLSI
2003
IEEE
135views VLSI» more  GLVLSI 2003»
14 years 2 months ago
Constructing exact octagonal steiner minimal trees
Octagonal Steiner Minimal Trees (OSMTs) are used in the global routing phase of pervasive octagonal VLSI layout. The OSMT problem seeks a minimal length spanning structure using e...
Chris Coulston
UIST
2003
ACM
14 years 2 months ago
Tracking menus
We describe a new type of graphical user interface widget, known as a “tracking menu.” A tracking menu consists of a cluster of graphical buttons, and as with traditional menu...
George W. Fitzmaurice, Azam Khan, Robert Piek&eacu...