This paper provides insight into the novel solutions used to build SoCs targeting increased productivity in a complex environment. Design of such SoCs relies on multi-team, multi-...
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
In this paper, the hardware implementation of a vector median like filter is proposed. Firstly, the extension of median filtering to the case of multicomponent images is addressed...
Jocelyn Chanussot, Michel Paindavoine, Patrick Lam...
This paper combines an adaptive supply-voltage scheme with self-timed CMOS digital design, to achieve low power performance. The supply-voltage automatically tracks the input data...
—Real-time applications typically operate under strict timing and dependability constraints. Although traditional data replication protocols provide fault tolerance, real-time gu...
Ashish Mehra, Jennifer Rexford, Hock-Siong Ang, Fa...