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DATE
2008
IEEE
99views Hardware» more  DATE 2008»
15 years 11 months ago
Subsystem Exchange in a Concurrent Design Process Environment
This paper provides insight into the novel solutions used to build SoCs targeting increased productivity in a complex environment. Design of such SoCs relies on multi-team, multi-...
Marino Strik, Alain Gonier, Paul Williams
ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
15 years 9 months ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
ICIP
1999
IEEE
16 years 6 months ago
Real Time Vector Median Like Filter FPGA Design and Application to Color Image Filtering
In this paper, the hardware implementation of a vector median like filter is proposed. Firstly, the extension of median filtering to the case of multicomponent images is addressed...
Jocelyn Chanussot, Michel Paindavoine, Patrick Lam...
121
Voted
VLSID
2003
IEEE
115views VLSI» more  VLSID 2003»
16 years 4 months ago
An Adaptive Supply-Voltage Scheme for Low Power Self-Timed CMOS Digital Design
This paper combines an adaptive supply-voltage scheme with self-timed CMOS digital design, to achieve low power performance. The supply-voltage automatically tracks the input data...
W. Kuang, J. S. Yuan
RTAS
1995
IEEE
15 years 8 months ago
Design and evaluation of a window-consistent replication service
—Real-time applications typically operate under strict timing and dependability constraints. Although traditional data replication protocols provide fault tolerance, real-time gu...
Ashish Mehra, Jennifer Rexford, Hock-Siong Ang, Fa...