100 search results - page 4 / 20 » Designing Digital Circuits for the Knapsack Problem |
CCL
1994
Springer
13 years 11 months ago
1994
Springer
Abstract: This paper describes the application of CLP (constraint logic programming) to several digital circuit design problems. It is shown that logic programming together with ef...
EH
2003
IEEE
14 years 21 days ago
2003
IEEE
This paper describes a multi-objective Evolutionary Algorithm (EA) system for the synthesis of efficient non-linear VLSI circuit modules. The EA takes the specification for a no...
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
In this paper, we consider the problem of maximizing the battery life (or duration of service) in battery-powered CMOS circuits. We first show that the battery efficiency (or utili...
ISQED
2010
IEEE
13 years 9 months ago
2010
IEEE
Circuit design under process variation can be formulated mathematically as a robust optimization problem with a yield constraint. Existing methods force designers to either resort...
ISQED
2009
IEEE
14 years 2 months ago
2009
IEEE
— With continued scaling, reliability is emerging as a critical challenge for the designers of digital circuits. The challenge stems in part from the lack of computationally ef...