397 search results - page 40 / 80 » Designing Fast Asynchronous Circuits |
FPL
2005
Springer
14 years 3 months ago
2005
Springer
This paper presents a configuration memory architecture that offers fast FPGA reconfiguration. The underlying principle behind the design is the use of fine-grained partial rec...
ASPDAC
2007
ACM
14 years 1 months ago
2007
ACM
We present a robust, automated oscillator macromodeling technique for extracting comprehensive phase and amplitude macromodels from oscillators' SPICE circuit descriptions. Th...
ARITH
2009
IEEE
14 years 4 months ago
2009
IEEE
Moduli of the form 2n ± 1, which greatly simplify certain arithmetic operations in residue number systems (RNS), have been of longstanding interest. A steady stream of designs fo...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
Input vector control (IVC) technique utilizes the stack effect in CMOS circuit to apply the minimum leakage vector (MLV) to the circuit at the sleep mode to reduce leakage. Additi...
DATE
2006
IEEE
14 years 4 months ago
2006
IEEE
Soft errors have emerged as an important reliability challenge for nanoscale VLSI designs. In this paper, we present a fast and efficient soft error rate (SER) computation algorit...