397 search results - page 54 / 80 » Designing Fast Asynchronous Circuits |
PATMOS
2005
Springer
14 years 1 months ago
2005
Springer
Abstract. Based on a previously reported request driven technique for Globally-Asynchronous Locally-Synchronous (GALS) circuits this paper presents two significant enhancements. Fi...
HPCA
1998
IEEE
13 years 11 months ago
1998
IEEE
The counterflow pipeline concept was originated by Sproull et al.[1] to demonstrate the concept of asynchronous circuits. This architecture relies on distributed decision making an...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
In this paper, we present power emulation, a novel design paradigm that utilizes hardware acceleration for the purpose of fast power estimation. Power emulation is based on the ob...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Stalls, due to mis-matches in communication rates, are a major performance obstacle in pipelined circuits. If the rate of data production is faster than the rate of consumption, t...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
Statistical static timing analysis (SSTA) has emerged as an essential tool for nanoscale designs. Monte Carlo methods are universally employed to validate the accuracy of the appr...