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CHES
2006
Springer
88views Cryptology» more  CHES 2006»
13 years 11 months ago
Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage
Recent research has shown that cryptographers with glitches are vulnerable in front of Side Channel Attacks (SCA). Since then, several methods, such as Wave Dynamic Differential Lo...
Zhimin Chen, Yujie Zhou
NIPS
2003
13 years 8 months ago
A Mixed-Signal VLSI for Real-Time Generation of Edge-Based Image Vectors
A mixed-signal image filtering VLSI has been developed aiming at real-time generation of edge-based image vectors for robust image recognition. A four-stage asynchronous median de...
Masakazu Yagi, Hideo Yamasaki, Tadashi Shibata
DAC
2003
ACM
14 years 8 months ago
An O(nlogn) time algorithm for optimal buffer insertion
The classic algorithm for optimal buffer insertion due to van Ginneken has time and space complexity O(n2 ), where n is the number of possible buffer positions. We present a new a...
Weiping Shi, Zhuo Li
EH
2003
IEEE
136views Hardware» more  EH 2003»
14 years 24 days ago
Experimental Results in Evolutionary Fault-Recovery for Field Programmable
This paper presents experimental results of fast intrinsic evolutionary design and evolutionary fault recovery of a 4-bit Digital to Analog Converter (DAC) using the JPL stand-alo...
Ricardo Salem Zebulum, Didier Keymeulen, Vu Duong,...
ICFP
2008
ACM
14 years 7 months ago
Functional netlists
In efforts to overcome the complexity of the syntax and the lack of formal semantics of conventional hardware description languages, a number of functional hardware description la...
Sungwoo Park, Jinha Kim, Hyeonseung Im