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» Designing Leakage Aware Multipliers
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PVLDB
2010
117views more  PVLDB 2010»
13 years 5 months ago
Building Disclosure Risk Aware Query Optimizers for Relational Databases
Many DBMS products in the market provide built in encryption support to deal with the security concerns of the organizations. This solution is quite effective in preventing data ...
Mustafa Canim, Murat Kantarcioglu, Bijit Hore, Sha...
ISLPED
2009
ACM
108views Hardware» more  ISLPED 2009»
13 years 11 months ago
Technology flavor selection and adaptive techniques for timing-constrained 45nm subthreshold circuits
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
David Bol, Denis Flandre, Jean-Didier Legat
HPCA
2009
IEEE
14 years 1 months ago
Soft error vulnerability aware process variation mitigation
As transistor process technology approaches the nanometer scale, process variation significantly affects the design and optimization of high performance microprocessors. Prior stu...
Xin Fu, Tao Li, José A. B. Fortes
ICCD
2008
IEEE
111views Hardware» more  ICCD 2008»
14 years 3 months ago
Power switch characterization for fine-grained dynamic voltage scaling
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...
Liang Di, Mateja Putic, John Lach, Benton H. Calho...
ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
14 years 3 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...