122 search results - page 12 / 25 » Designing a Memory Module Tester |
DATE
2002
IEEE
14 years 2 months ago
2002
IEEE
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
DAC
2001
ACM
14 years 10 months ago
2001
ACM
We present a design flow for the generation of application-specific multiprocessor architectures. In the flow, architectural parameters are first extracted from a high-level syste...
CAMP
2000
IEEE
14 years 1 months ago
2000
IEEE
This paper presents an FPGA based architecture for high speed edge and corner detection. Applications targeted are in high speed computer vision (i.e. more than 100 images per sec...
INFOCOM
2009
IEEE
14 years 3 months ago
2009
IEEE
—The spread of a source host is the number of distinct destinations that it has sent packets to during a measurement period. A spread estimator is a software/hardware module on a...
CA
1999
IEEE
14 years 1 months ago
1999
IEEE
This paper presents a simple and efficient method of modeling synthetic vision, memory, and learning for autonomous animated characters in real-time virtual environments. The mode...