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» Designing a Memory Module Tester
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DATE
2002
IEEE
83views Hardware» more  DATE 2002»
14 years 2 months ago
Memory System Connectivity Exploration
In programmable embedded systems, the memory subsystem represents a major cost, performance and power bottleneck. To optimize the system for such different goals, the designer wou...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
DAC
2000
ACM
14 years 10 months ago
Embedded hardware and software self-testing methodologies for processor cores
At-speed testing of GHz processors using external testers may not be technically and economically feasible. Hence, there is an emerging need for low-cost, high-quality self-test m...
Li Chen, Sujit Dey, Pablo Sanchez, Krishna Sekar, ...
DAC
1999
ACM
14 years 1 months ago
Microprocessor Based Testing for Core-Based System on Chip
The purpose of this paper is to develop a exible design for test methodology for testing a core-based system on chip SOC. The novel feature of the approach is the use an embedde...
Christos A. Papachristou, F. Martin, Mehrdad Noura...
GCC
2004
Springer
14 years 2 months ago
EEMAS: An Enabling Environment for Multidisciplinary Application Simulations
Abstract. EEMAS environment is a problem-solving environment for multidisciplinary application simulations. Within the EEMAS, there are four categories of modules involved, namely ...
Lijun Xie, Yao Zheng, Jifa Zhang, Xin Huang, Zheng...
DATE
2006
IEEE
202views Hardware» more  DATE 2006»
14 years 3 months ago
Automatic systemC design configuration for a faster evaluation of different partitioning alternatives
In this paper we present a methodology that is based on SystemC [1] for rapid prototyping to greatly enhance and accelerate the exploration of complex systems to optimize the syst...
Nico Bannow, Karsten Haug, Wolfgang Rosenstiel