Sciweavers

11242 search results - page 50 / 2249
» Designing a Super-Peer Network
Sort
View
124
Voted
DATE
2010
IEEE
118views Hardware» more  DATE 2010»
15 years 2 months ago
Exploiting multiple switch libraries in topology synthesis of on-chip interconnection network
Abstract—On-chip interconnection network is a crucial design component in high-performance System-on-Chips (SoCs). Many of previous works have focused on the automation of its to...
Minje Jun, Sungroh Yoon, Eui-Young Chung
151
Voted
COMPUTER
2002
129views more  COMPUTER 2002»
15 years 3 months ago
Networks on Chips: A New SoC Paradigm
of abstraction and coarse granularity and distributed communication control. Focusing on using probabilistic metrics such as average values or variance to quantify design objective...
Luca Benini, Giovanni De Micheli
162
Voted
AEI
1999
134views more  AEI 1999»
15 years 3 months ago
Automatic design synthesis with artificial intelligence techniques
Design synthesis represents a highly complex task in the field of industrial design. The main difficulty in automating it is the definition of the design and performance spaces, i...
Francisco J. Vico, Francisco J. Veredas, Jos&eacut...
122
Voted
TSMC
1998
62views more  TSMC 1998»
15 years 3 months ago
Performance based design of high-level language-directed computer architectures
— This paper is concerned with the analytical modeling of computer architectures to aid in the design of high-level language-directed computer architectures. High-level language-...
Rajendra S. Katti, Mark L. Manwaring
151
Voted
FECS
2009
122views Education» more  FECS 2009»
15 years 1 months ago
Design and Assessment of a Multidisciplinary Course in Service Oriented Architecture
- Service Oriented Architecture (SOA) is finding increasing acceptance in industry for the design of enterprise-scale, networked applications. However, opportunities to study SOA i...
Thomas Way, Vijay Gehlot