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» Designing agent chips

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HPCA
2007
IEEE

96views Distributed And Parallel Com...» more HPCA 2007»

A Domain-Specific On-Chip Network Design for Large Scale Cache Systems

14 years 11 months ago

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Yuho Jin, Eun Jung Kim, Ki Hwan Yum

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ISLPED
2005
ACM

100views Hardware» more ISLPED 2005»

Joint exploration of architectural and physical design spaces with thermal consideration

14 years 4 months ago

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Heat is a main concern for processors in deep sub-micron technologies. The chip temperature is aﬀected by both the power consumption of processor components and the chip layout....

Yen-Wei Wu, Chia-Lin Yang, Ping-Hung Yuh, Yao-Wen ...

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ISPD
1997
ACM

142views Hardware» more ISPD 1997»

Minimization of chip size and power consumption of high-speed VLSI buffers

14 years 3 months ago

Download www.cecs.uci.edu

In this paper, we study optimal bu er design in high-performance VLSI systems. Speci cally, we design a bu er for a given load such that chip area and power dissipation are minima...

D. Zhou, X. Y. Liu

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AMEC
2000
Springer

75views Intelligent Agents» more AMEC 2000»

Algorithm Design for Agents which Participate in Multiple Simultaneous Auctions

14 years 3 months ago

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Chris Preist, Claudio Bartolini, Ivan Phillips

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