2945 search results - page 122 / 589 » Designing and Implementing Malicious Hardware |
134
Voted
DATE
2008
IEEE
2008
IEEE
An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications
15 years 11 months ago
Novel reconfigurable computing platforms enable efficient realizations of complex signal processing applications by allowing exploitation of parallelization resulting in high thro...
147
Voted
ARC
2006
Springer
15 years 8 months ago
2006
Springer
Abstract. This paper presents a novel partially reconfigurable FIR filter design that employs dynamic partial reconfiguration. Our scope is to implement a low-power, area-efficient...
164
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GLVLSI
2009
IEEE
2009
IEEE
Physical unclonable function and true random number generator: a compact and scalable implementation
15 years 8 months ago
Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) are two very useful components in secure system design. PUFs can be used to extract chip-unique signat...
115
Voted
ASAP
2002
IEEE
15 years 9 months ago
2002
IEEE
† Introducing FPGA components into DSP system implementations creates an assortment of challenges across system architecture and logic design. Recognizing that some of the greate...
183
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DELTA
2006
IEEE
15 years 8 months ago
2006
IEEE
This paper describes the concept, architecture, development and demonstration of a real time, high performance, software defined 4-receiver system and a space time decoder to be i...