2945 search results - page 496 / 589 » Designing and Implementing Malicious Hardware |
156
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ISCA
2009
IEEE
16 years 20 days ago
2009
IEEE
The incidence of hard errors in CPUs is a challenge for future multicore designs due to increasing total core area. Even if the location and nature of hard errors are known a prio...
168
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SAMOS
2007
Springer
16 years 4 days ago
2007
Springer
— General purpose architectures are designed to offer average high performance regardless of the particular application that is being run. Performance and power inefficiencies a...
144
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MICRO
2006
IEEE
16 years 1 days ago
2006
IEEE
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
150
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WORDS
2003
IEEE
15 years 11 months ago
2003
IEEE
The ’Distributed Control Lab’ [6] at Hasso-PlattnerInstitute, University of Potsdam allows experimentation with a variety of physical equipment via the web (intra and internet...
163
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SIGMETRICS
2008
ACM
15 years 6 months ago
2008
ACM
Enterprise customers are increasingly adopting MPLS (Multiprotocol Label Switching) VPN (Virtual Private Network) service that offers direct any-to-any reachability among the cust...