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» Designing and Implementing Malicious Hardware
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DAC
2002
ACM
16 years 5 months ago
Scheduler-based DRAM energy management
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
Victor Delaluz, Anand Sivasubramaniam, Mahmut T. K...
DAC
2003
ACM
16 years 5 months ago
Behavioral consistency of C and verilog programs using bounded model checking
We present an algorithm that checks behavioral consistency between an ANSI-C program and a circuit given in Verilog using Bounded Model Checking. Both the circuit and the program ...
Edmund M. Clarke, Daniel Kroening, Karen Yorav
DAC
2004
ACM
16 years 5 months ago
An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory
Massive data transfer encountered in emerging multimedia embedded applications requires architecture allowing both highly distributed memory structure and multiprocessor computati...
Sang-Il Han, Amer Baghdadi, Marius Bonaciu, Soo-Ik...
PPOPP
2009
ACM
16 years 4 months ago
Efficient and scalable multiprocessor fair scheduling using distributed weighted round-robin
Fairness is an essential requirement of any operating system scheduler. Unfortunately, existing fair scheduling algorithms are either inaccurate or inefficient and non-scalable fo...
Tong Li, Dan P. Baumberger, Scott Hahn
MOBISYS
2008
ACM
16 years 3 months ago
Micro power management of active 802.11 interfaces
Wireless interfaces are major power consumers on mobile systems. Considerable research has improved the energy efficiency of elongated idle periods or created more elongated idle ...
Jiayang Liu, Lin Zhong