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SIGCOMM
2009
ACM
14 years 2 months ago
Optimizing the BSD routing system for parallel processing
The routing architecture of the original 4.4BSD [3] kernel has been deployed successfully without major design modification for over 15 years. In the unified routing architectur...
Qing Li, Kip Macy
CASES
2007
ACM
13 years 11 months ago
Eliminating inter-process cache interference through cache reconfigurability for real-time and low-power embedded multi-tasking
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...
Rakesh Reddy, Peter Petrov
IWMM
2011
Springer
206views Hardware» more  IWMM 2011»
12 years 10 months ago
A comprehensive evaluation of object scanning techniques
At the heart of all garbage collectors lies the process of identifying and processing reference fields within an object. Despite its key role, and evidence of many different impl...
Robin Garner, Stephen M. Blackburn, Daniel Frampto...
DOLAP
2000
ACM
14 years 1 days ago
CUBIST: A New Algorithm For Improving the Performance of Ad-hoc OLAP Queries
Being able to efficiently answer arbitrary OLAP queries that aggregate along any combination of dimensions over numerical and categorical attributes has been a continued, major co...
Lixin Fu, Joachim Hammer
SIGMETRICS
2003
ACM
147views Hardware» more  SIGMETRICS 2003»
14 years 28 days ago
Effect of node size on the performance of cache-conscious B+-trees
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
Richard A. Hankins, Jignesh M. Patel