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FPGA
2010
ACM
191views FPGA» more  FPGA 2010»
14 years 4 months ago
Voter insertion algorithms for FPGA designs using triple modular redundancy
Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...
Jonathan M. Johnson, Michael J. Wirthlin
RTAS
2008
IEEE
14 years 4 months ago
A Switch Design for Real-Time Industrial Networks
The convergence of computers and the physical world is the theme for next generation networking research. This trend calls for real-time network infrastructure, which requires a h...
Qixin Wang, Sathish Gopalakrishnan, Xue Liu, Lui S...
SOCC
2008
IEEE
169views Education» more  SOCC 2008»
14 years 4 months ago
A subthreshold single ended I/O SRAM cell design for nanometer CMOS technologies
— Lowering supply voltage is an effective technique for power reduction in memory design, however traditional memory cell design fails to operate, as shown in [3], [10], at ultra...
Jawar Singh, Jimson Mathew, Dhiraj K. Pradhan, Sar...
CP
2007
Springer
14 years 4 months ago
An Integrated White+Black Box Approach for Designing and Tuning Stochastic Local Search
Abstract. Stochastic Local Search (SLS) is a simple and effective paradigm for attacking a variety of Combinatorial (Optimization) Problems (COP). However, it is often non-trivial...
Steven Halim, Roland H. C. Yap, Hoong Chuin Lau
KBSE
2006
IEEE
14 years 4 months ago
Reverse Engineering of Design Patterns from Java Source Code
Recovering design patterns can enhance existing source code analysis tools by bringing program understanding to the design level. This paper presents a new, fully automated patter...
Nija Shi, Ronald A. Olsson