453 search results - page 55 / 91 » Designing hardware with dynamic memory abstraction |
135
Voted
IWMM
2004
Springer
15 years 9 months ago
2004
Springer
We document the design and implementation of a “production” incremental garbage collector for GHC 6.2. It builds on our earlier work (Non-stop Haskell) that exploited GHC’s ...
121
Voted
DATE
2006
IEEE
15 years 9 months ago
2006
IEEE
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
122
Voted
ICCAD
2002
IEEE
16 years 17 days ago
2002
IEEE
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
119
Voted
EUROPAR
2005
Springer
15 years 9 months ago
2005
Springer
Abstract. To analyze the correctness and the performance of a program, information about the dynamic behavior of all participating processes is needed. The dynamic behavior can be ...
134
Voted
ASAP
2005
IEEE
15 years 9 months ago
2005
IEEE
In this paper we introduce a design methodology that allows the system/circuit designer to build reliable systems out of unreliable nano-scale components. The central point of our...