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» Designing secure systems on reconfigurable hardware
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DATE
2010
IEEE
120views Hardware» more  DATE 2010»
14 years 19 days ago
UML design for dynamically reconfigurable multiprocessor embedded systems
Jorgiano Vidal, Florent de Lamotte, Guy Gogniat, J...
ERSA
2006
282views Hardware» more  ERSA 2006»
13 years 9 months ago
SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture
Reconfigurable devices, such as FPGAs, introduce into the design workflow of embedded systems a new degree of freedom: the designer can have the system autonomously modify the fun...
Carlo Amicucci, Fabrizio Ferrandi, Marco D. Santam...
ISCAS
2003
IEEE
129views Hardware» more  ISCAS 2003»
14 years 24 days ago
SONICmole: a debugging environment for the UltraSONIC reconfigurable computer
Reconfigurable Computers based on a combination of conventional microprocessors and Field Programmable Gate Arrays (FPGAs) presents new challenges to designers. Debugging on such ...
Theerayod Wiangtong, Chun Te Ewe, Peter Y. K. Cheu...
FCCM
2008
IEEE
133views VLSI» more  FCCM 2008»
13 years 9 months ago
Runtime Filesystem Support for Reconfigurable FPGA Hardware Processes in BORPH
This paper presents the design of BORPH's file system layer for FPGA-based reconfigurable computers. BORPH provides user FPGA designs that execute as hardware processes acces...
Hayden Kwok-Hay So, Robert W. Brodersen
CODES
2009
IEEE
13 years 11 months ago
Minimization of the reconfiguration latency for the mapping of applications on FPGA-based systems
Field-Programmable Gate Arrays (FPGAs) have become promising mapping fabric for the implementation of System-on-Chip (SoC) platforms, due to their large capacity and their enhance...
Vincenzo Rana, Srinivasan Murali, David Atienza, M...