559 search results - page 14 / 112 » Designing secure systems on reconfigurable hardware |
CHES
2004
Springer
13 years 11 months ago
2004
Springer
Abstract. Recently, Lenstra and Verheul proposed an efficient cryptosystem called XTR. This system represents elements of F p6 with order dividing p2 -p+1 by their trace over Fp2 ....
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Tools and a design methodology have been developed to support partial run-time reconfiguration of FPGA logic on the Field Programmable Port Extender. High-speed Internet packet pr...
CC
2008
Springer
13 years 9 months ago
2008
Springer
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
FPGA
2007
ACM
13 years 11 months ago
2007
ACM
Progress in reconfigurable hardware technology allows the implementation of complete SoCs in today's FPGAs. In the context design for reliability, software checkpointing is a...
ISMVL
2000
IEEE
13 years 12 months ago
2000
IEEE
Evolvable Hardware (EHW) refers to HW design and self-reconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, comments o...