1226 search results - page 28 / 246 » Designing systems-on-chip using cores |
3DPVT
2004
IEEE
14 years 1 months ago
2004
IEEE
In this paper, we propose a viewer for huge point-sampled models by combining out-of-core technologies with view-dependent level-of-detail (LOD) control. This viewer is designed o...
DDECS
2008
IEEE
13 years 12 months ago
2008
IEEE
The paper introduces a cryptographic System on a Chip (SoC) implementation based on recent Actel nonvolatile FPGA Fusion chip with embedded ARM7 soft-core processor. The SoC is bui...
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
—In this paper, we propose a scalable and transparent parallelization scheme using threads for multi-core processor. The performance achieved by our scheme is scalable to the num...
VLSID
2005
IEEE
14 years 10 months ago
2005
IEEE
Abstract-- We present two-dimensional (space/time) compression techniques that reduce test data volume and test application time for scan testing of intellectual property (IP) core...
FLAIRS
2000
13 years 11 months ago
2000
Traditional benchmarking methods for information retrieval (IR) are based on experimental performance evaluation. Although the metrics precision and recall can measure the perform...