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MICRO
2007
IEEE
188views Hardware» more  MICRO 2007»
14 years 4 months ago
Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding
In deep sub-micron ICs, growing amounts of ondie memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. As scaling progresses...
Jangwoo Kim, Nikos Hardavellas, Ken Mai, Babak Fal...
TVLSI
2002
102views more  TVLSI 2002»
13 years 9 months ago
Algorithm level re-computing using implementation diversity: a register transfer level concurrent error detection technique
Concurrent error detection (CED) based on time redundancy entails performing the normal computation and the re-computation at different times and then comparing their results. Time...
Ramesh Karri, Kaijie Wu
DSN
2002
IEEE
14 years 2 months ago
On the Placement of Software Mechanisms for Detection of Data Errors
An important aspect in the development of dependable software is to decide where to locate mechanisms for efficient error detection and recovery. We present a comparison between ...
Martin Hiller, Arshad Jhumka, Neeraj Suri
SPIN
2009
Springer
14 years 4 months ago
Identifying Modeling Errors in Signatures by Model Checking
: Most intrusion detection systems deployed today apply misuse detection as analysis method. Misuse detection searches for attack traces in the recorded audit data using predefined...
Sebastian Schmerl, Michael Vogel, Hartmut Kön...
SEUS
2010
IEEE
13 years 8 months ago
Error Detection Rate of MC/DC for a Case Study from the Automotive Domain
Chilenski and Miller [1] claim that the error detection probability of a test set with full modified condition/decision coverage (MC/DC) on the system under test converges to 100%...
Susanne Kandl, Raimund Kirner